The present invention relates to a semiconductor device and a method of manufacturing the same.
There has been known a semiconductor device disclosed in Patent Document 1 (Japanese Unexamined Patent Application Publication No. 2006-196518). The semiconductor device disclosed in Patent Document 1 is a trench-gate type power MOSFET (Metal Oxide Semiconductor Field Effect Transistor) which has a super-junction configuration. According to the semiconductor device disclosed in Patent Document 1, a trench is formed in a surface of a semiconductor substrate in a peripheral region. In the trench, a gate electrode is buried.
As other configurations of the trench-gate type power MOSFET, a configuration disclosed in Patent Document 2 (Japanese Unexamined Patent Application Publication No. 2013-33931) and a configuration disclosed in Patent Document (Japanese Unexamined Patent Application Publication No. 2012-129446) are known.